A single-bit digital DC-blocker using ternary filtering

Sadik, A, Hussain, Z and O'Shea, P 2005, 'A single-bit digital DC-blocker using ternary filtering', in R. Harris (ed.) Proceedings of the TENCON 2005 IEEE Region 10 Conference, Melbourne, Australia, 21-24 November 2005.


Document type: Conference Paper
Collection: Conference Papers

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Title A single-bit digital DC-blocker using ternary filtering
Author(s) Sadik, A
Hussain, Z
O'Shea, P
Year 2005
Conference name TENCON IEEE Region 10 Conference
Conference location Melbourne, Australia
Conference dates 21-24 November 2005
Proceedings title Proceedings of the TENCON 2005 IEEE Region 10 Conference
Editor(s) R. Harris
Publisher IEEE
Place of publication Melbourne
Abstract In this paper, a single-bit dc-blocker is presented. It is comprised of a ternary filtering stage preceded by a sigma-delta modulator. Different techniques are used to generate the ternary taps for hardware and performance optimization. Both the input and the output of this dc-blocker are assumed in single-bit format. The proposed dc-blocker can easily be implemented with FPGA.
Subjects Broadband and Modem Technology
Keyword(s) ternary filtering
DC-blocker
DOI - identifier 10.1109/TENCON.2005.301222
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