A new approach to clock jitter simulation in digital control system.

Tran Quang, L, Radcliffe, P and Wang, L 2017, 'A new approach to clock jitter simulation in digital control system.', in 11th Asian Control Conference (ASCC) 2017, Gold Coast, Australia, 17-20 December 2017, pp. 2563-2568.


Document type: Conference Paper
Collection: Conference Papers

Title A new approach to clock jitter simulation in digital control system.
Author(s) Tran Quang, L
Radcliffe, P
Wang, L
Year 2017
Conference name 11th Asian Control Conference (ASCC) 2017
Conference location Gold Coast, Australia
Conference dates 17-20 December 2017
Proceedings title 11th Asian Control Conference (ASCC) 2017
Publisher IEEE
Place of publication United States
Start page 2563
End page 2568
Total pages 6
Abstract Using current methods it is difficult to predict the effects of clock jitter on a real time control system. To be safe the designer will often choose an expensive high performance system where in fact a lower performance system with more jitter would be adequate. This paper proposes a new and novel technique to add realistic clock jitter to a MATLAB/Simulink based simulation of any real-time control system. This method is used to simulate a simple control system for speed control of a small DC motor and this is compared to the performance of a real system. Results show a close agreement between theory and the real system. It is further shown that considerable sampling jitter results in relatively small changes in performance for this system which suggests that a cheap controller with high jitter is quite adequate for the task. The pattern of jitter has been found to be important in affecting the response of the system. Most randomly chosen jitters have a small effect but particular patterns can have a much larger effect.
Subjects Control Systems, Robotics and Automation
Keyword(s) Jitter
Clocks
Delays
DC motors
Mathematical model
Hardware
Control systems
Copyright notice © 2017 IEEE
ISBN 9781509015733
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