Static performance comparison of prominent synchrophasor algorithms

Thilakarathne Mudiyanselage, C, Meegahapola, L and Fernando, W 2017, 'Static performance comparison of prominent synchrophasor algorithms', in Proceedings of the 7th Innovative Smart Grid Technologies - Asia (ISGT-Asia 2017), Auckland, New Zealand, 4 7 December 2017, pp. 446-451.


Document type: Conference Paper
Collection: Conference Papers

Title Static performance comparison of prominent synchrophasor algorithms
Author(s) Thilakarathne Mudiyanselage, C
Meegahapola, L
Fernando, W
Year 2017
Conference name ISGT-Asia 2017: Smart Grid for Smart Community
Conference location Auckland, New Zealand
Conference dates 4 7 December 2017
Proceedings title Proceedings of the 7th Innovative Smart Grid Technologies - Asia (ISGT-Asia 2017)
Publisher IEEE
Place of publication United States
Start page 446
End page 451
Total pages 6
Abstract Synchrophasor technology has become a prominent wide area measurement technique in the recent years. Development of robust synchrophasor estimation algorithms has been one of the key focus areas in the field of synchrophasor. However, there is a lack of performance comparison studies of these algorithms. Furthermore, the majority of existing studies are limited to simulation-based performance evaluation. This paper analyses the steady-state performance of three prominent synchrophasor estimation algorithms in simulations and hardware platforms. Results show that the performance of synchrophasor algorithms significantly vary based on the test case. Improvements to the synchrophasor estimation algorithms are also proposed and discussed in the paper.
Subjects Industrial Electronics
Keyword(s) Phasor measurement unit (PMU)
phase locked loop (PLL)
discrete Fourier transform (DFT)
quadrature demodulation
synchrophasor
total vector error (TVE)
DOI - identifier 10.1109/ISGT-Asia.2017.8378392
Copyright notice © 2017 IEEE
ISBN 9781538649510
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